Fields In DBG_CTL0 (0xE0042000, 0x0004)
| Field | Offset | Width |
gd32c103 |
gd32c113 |
|---|
| TIMER10_HOLD | 30 | 1 |
✔ |
✔ |
| TIMER9_HOLD | 29 | 1 |
✔ |
✔ |
| TIMER8_HOLD | 28 | 1 |
✔ |
✔ |
| TIMER13_HOLD | 27 | 1 |
✔ |
✔ |
| TIMER12_HOLD | 26 | 1 |
✔ |
✔ |
| TIMER11_HOLD | 25 | 1 |
✔ |
✔ |
| CAN1_HOLD | 21 | 1 |
✔ |
✔ |
| TIMER7_HOLD | 20 | 1 |
✔ |
✔ |
| TIMER6_HOLD | 19 | 1 |
✔ |
✔ |
| TIMER5_HOLD | 18 | 1 |
✔ |
✔ |
| TIMER4_HOLD | 17 | 1 |
✔ |
✔ |
| I2C1_HOLD | 16 | 1 |
✔ |
✔ |
| I2C0_HOLD | 15 | 1 |
✔ |
✔ |
| CAN0_HOLD | 14 | 1 |
✔ |
✔ |
| TIMER3_HOLD | 13 | 1 |
✔ |
✔ |
| TIMER2_HOLD | 12 | 1 |
✔ |
✔ |
| TIMER1_HOLD | 11 | 1 |
✔ |
✔ |
| TIMER0_HOLD | 10 | 1 |
✔ |
✔ |
| WWDGT_HOLD | 9 | 1 |
✔ |
✔ |
| FWDGT_HOLD | 8 | 1 |
✔ |
✔ |
| TRACE_IOEN | 5 | 1 |
✔ |
✔ |
| STB_HOLD | 2 | 1 |
✔ |
✔ |
| DSLP_HOLD | 1 | 1 |
✔ |
✔ |
| SLP_HOLD | 0 | 1 |
✔ |
✔ |